w24l011a 128k 8 high speed cmos static ram publication release date: august 1999 - 1 - revision a2 general description the w24l011a is a high speed, low power cmos static ram organized as 131072 8 bits that operates on a single 3.3-volt power supply. this device is manufactured using winbond's high performance cmos technology. features ? high speed access time: 10/12/15 ns ? single +3.3v power supply ? center power/ground pin configuration ? fully static operation ? all inputs and outputs directly ttl compatible ? three-state outputs ? available packages: 32-pin 300 mil and 400 mil soj pin configuration we 1 2 3 4 5 a7 a6 a5 a4 a3 a2 a1 6 7 8 9 a0 i/o1 cs v dd v ss i/o2 i/o3 i/o4 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 a16 a12 a13 oe a14 a15 i/o8 i/o7 i/o6 v ss v dd i/o5 a11 a10 a9 a8 block diagram a0 . cs a16 we i/o1 i/o8 oe v v . . data i/o array decoder core . control dd ss pin description symbol description a0 ? a16 address inputs i/o1 ? i/o8 data inputs/outputs cs chip select inputs we write enable input oe output enable input v dd power supply v ss ground
w24l011a - 2 - truth table cs oe we mode i/o1 ? i/o8 v dd current h x x not selected high z i sb , i sb1 l h h output disable high z i dd l l h read data out i dd l x l write d ata in i dd dc characteristics absolute maximum ratings parameter rating unit supply voltage to v ss potential -0.5 to +4.6 v input/output to v ss potential -0.5 to v dd +0.5 v allowable power dissipation 1.0 w storage temperature -65 to +150 c operating temperature 0 to +70 c note: exposure to conditions beyond those listed under absolute maximum ratings may adversely affect the life and reliability o f the device. operating characteristics (v dd = 3.3v 5%, v ss = 0v, t a = 0 to 70 c) parameter sym. test conditions min. typ. max. unit input low voltage v il - -0.5 - 0.8 v input high voltage v ih - +2.0 - v dd +0.5 v input leakage current i li v in = v ss to v dd -10 - +10 a output leakage current i lo v i/o = v ss to v dd cs = v ih (min.) or oe = v ih (min.) or we = v il (max.) -10 - +10 a output low voltage v ol i ol = +8.0 ma - - 0.4 v output high voltage v oh i oh = -4.0 ma 2.4 - - v operating power i dd cs = v il (max.), i/o = 0 ma 10 - - 130 supply current cycle = mim., duty = 100% 12 - - 120 ma 15 - - 110 standby power i sb cs = v ih (min.) - - 30 ma supply current i sb1 cs v dd -0.2v - - 10 ma note: typical characteristics are at v dd = 3.3v, t a = 25 c.
w24l011a publication release date: august 1999 - 3 - revision a2 capacitance (v dd = 3.3v, t a = 25 c, f = 1 mhz) parameter sym. conditions max. unit input capacitance c in v in = 0v 8 pf input/output capacitance c i/o v out = 0v 10 pf note: these parameters are sampled but not 100% tested. ac characteristics ac test conditions parameter conditions input pulse levels 0v to 3v input rise and fall times 3 ns input and output timing reference level 1.5v output load c l = 30 pf, i oh /i ol = -4 ma/8 ma ac test loads and waveform 90% 90% 3 ns 10% 3 ns 10% r1 320 ohm 3.3v output r2 350 ohm 30 pf including jig and scope 3.0v 0v 3.3v output r1 320 ohm 5pf including jig and scope r2 350 ohm (for t clz, olz, chz, ohz, whz, ow t t t tt )
w24l011a - 4 - ac characteristics, continued (v dd = 3.3v 5%, v ss = 0v, t a = 0 to 70 c) read cycle parameter sym. w24l011a-10 w24l011a-12 w24l011a-15 unit min. max. min. max. min. max. read cycle time t rc 10 - 12 - 15 - ns address access time t aa - 10 - 12 - 15 ns chip select access time t acs - 10 - 12 - 15 ns output enable to output valid t aoe - 5 - 6 - 8 ns chip selection to output in low z t clz 3 - 3 - - 3 ns output enable to output in low z t olz * 0 - 0 - - ns chip deselection to output in high z t chz - 5 - 6 - 8 ns output disable to output in high z t ohz * - 5 - 6 - 8 ns output hold from address change t oh 3 - 3 - 3 - ns * these parameters are sampled but not 100% tested. write cycle parameter sym. w24l011a-10 w24l011a-12 w24l011a-15 unit min. max. min. max. min. max. write cycle time t wc 10 - 12 - 15 - ns chip selection to end of write t cw 9 - 10 - 12 - ns address valid to end of write t aw 9 - 10 - 12 - ns address setup time t as 0 - 0 - 0 - ns write pulse width t wp 9 - 10 - 12 - ns write recovery time cs , we t wr 0 - 0 - 0 - ns data valid to end of write t dw 5 - 7 - 9 - ns data hold from end of write t dh 0 - 0 - 0 - ns write to output in high z t whz * - 5 - 6 - 8 ns output disable to output in high z t ohz * - 5 - 6 - 8 ns output active from end of write t ow 0 - 0 - 0 - ns * these parameters are sampled but not 100% tested.
w24l011a publication release date: august 1999 - 5 - revision a2 timing waveforms read cycle 1 (address controlled, cs = oe = v il, we = v ih ) address t t t t d oh aa rc oh out read cycle 2 (chip select controlled) cs t t acs chz d t clz out address t rc read cycle 3 (output enable controlled) oe cs t t t t t t t oh chz aa aoe clz acs olz d out address t rc
w24l011a - 6 - timing waveforms, continued write cycle 1 ( oe clock) address oe cs t wc t wr t cw we d d t (1, 4) out in ohz t aw t wp t as t dw t dh write cycle 2 ( oe = v il fixed) address cs t t t wc cw wr we d d t t t t t t (2) (3) t t aw wp ow whz (1, 4) dw dh oh as out in notes: 1. during this period, i/o pins are in the output state, so input signals of opposite phase to the outputs should not be applie d. 2. the data output from d out are the same as the data written to d in during the write cycle. 3. dout provides the read data for the next address. 4. transition is measured 200 mv from steady state with c l = 5 pf. this parameter is guaranteed but not 100% tested.
w24l011a publication release date: august 1999 - 7 - revision a2 ordering information part no. access time (ns) operating current max. (ma) standby current max. (ma) package w24l011aj-10 10 130 10 300 mil soj w24l011aj-12 12 120 10 300 mil soj w24l011aj-15 15 110 10 300 mil soj w24l011ai-10 10 130 10 400 mil soj w24l011ai-12 12 120 10 400 mil soj w24l011ai-15 15 110 10 400 mil soj notes: 1. winbond reserves the right to make changes to its products without prior notice. 2. purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications where personal injury might occur as a consequence of product failure.
w24l011a - 8 - package dimensions 32-pin soj (300 mil) d h b b e e 1 16 17 32 e y a a a seating plane c l s symbol dimension in mm dimension in inches min. nom. max. min. nom. max. a a a b b c d e e e h l s y 0.140 0.020 0.095 0.100 0.105 0.032 0.028 0.026 0.022 0.018 0.016 0.014 0.010 0.008 0.835 0.825 0.305 0.300 0.295 0.056 0.050 0.044 0.287 0.267 0.247 0.345 0.335 0.325 0.080 0.045 0.004 010 0.815 3.556 0.508 2.413 2.540 2.667 0.813 0.711 0.660 0.559 0.457 0.406 0.356 0.254 0.203 21.209 20.955 7.747 7.620 7.493 1.422 1.270 1.118 7.290 6.782 6.274 8.763 8.509 8.255 2.032 1.143 0.102 0 10 20.701 __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ 1 2 1 e e 1 2 1 32-pin soj (400 mil) 1. dimension d max & s include mold flash or tie bar burrs. 2. dimension b does not include dambar protrusion/intrusion. 4. controlling dimension: inches 5. general appearance spec. should be based on final visual inspection spec. 0.28 0.15 0.011 0.006 notes: symbol min. nom. max. max. nom. min. dimension in inches dimension in mm a b c d e h e l y a a s 1 1 2 e 0.145 3.68 0.025 0.105 0.016 0.110 0.115 0.020 2.67 0.41 0.635 2.79 2.91 0.51 0.082 0.004 -5 6 0.825 0.830 2.08 20.96 21.08 0.37 9.40 0.10 10.29 10.16 10.03 0.405 0.400 0.395 11.05 11.18 11.31 0.435 0.440 0.445 3. dimension d & e include mold mismatch and are determined at the mold parting line. e b 1 0.044 0.050 0.056 1.12 1.27 1.42 0.045 1.14 d seating plane s b b 1 1 32 e 1 a y a 2 a l 1 e 16 17 e e h c 3.51 3.33 0.138 0.131 0.026 0.028 0.032 0.66 0.71 0.81 0.820 20.83 0.018 0.46 0.008 0.20 0.360 0.380 9.15 9.65 -5 6 22
w24l011a publication release date: august 1999 - 9 - revision a2 version history version date page description a1 august 1997 initial issued a2 august 1999 1, 2, 4, 7 add 15 ns specification headquarters no. 4, creation rd. iii, science-based industrial park, hsinchu, taiwan tel: 886-3-5770066 fax: 886-3-5792647 http://www.winbond.com.tw/ voice & fax-on-demand: 886-2-7197006 taipei office 11f, no. 115, sec. 3, min-sheng east rd., taipei, taiwan tel: 886-2-7190505 fax: 886-2-7197502 winbond electronics (h.k.) ltd. rm. 803, world trade square, tower ii, 123 hoi bun rd., kwun tong, kowloon, hong kong tel: 852-27513100 fax: 852-27552064 winbond electronics north america corp. winbond memory lab. winbond microelectronics corp. winbond systems lab. 2730 orchard parkway, san jose, ca 95134, u.s.a. tel: 1-408-9436666 fax: 1-408-9436668 note: all data and specifications are subject to change without notice.
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